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| author | Kévin Le Gouguec <kevin.legouguec@airbus.com> | 2019-03-26 14:36:07 +0100 |
|---|---|---|
| committer | Kévin Le Gouguec <kevin.legouguec@airbus.com> | 2019-03-26 15:44:53 +0100 |
| commit | 1804b12b968585d4d1adc0e9f39903b9d943c670 (patch) | |
| tree | af7291cfaf074f2f2adc1fca40c895b48998a039 /implementations/vhdl/Decrypt/lilliputtbci128v1/top.vhd | |
| parent | 94cd233460e4b52521702f4431eab4f68a4f410c (diff) | |
| download | lilliput-ae-implem-1804b12b968585d4d1adc0e9f39903b9d943c670.tar.xz | |
[implem-vhdl] Ajout des sources de Gaëtan
Diffstat (limited to 'implementations/vhdl/Decrypt/lilliputtbci128v1/top.vhd')
| -rw-r--r-- | implementations/vhdl/Decrypt/lilliputtbci128v1/top.vhd | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/implementations/vhdl/Decrypt/lilliputtbci128v1/top.vhd b/implementations/vhdl/Decrypt/lilliputtbci128v1/top.vhd new file mode 100644 index 0000000..0f343e1 --- /dev/null +++ b/implementations/vhdl/Decrypt/lilliputtbci128v1/top.vhd @@ -0,0 +1,102 @@ +library IEEE; +library work; +use IEEE.numeric_std.all; +use IEEE.std_logic_1164.all; +use work.crypt_pack.all; + + +entity top is port ( + start_i : in std_logic; + clock_i : in std_logic; + reset_i : in std_logic; + data_i : in bit128; + key_i : in bit_key; + data_o : out bit128; + tweak_i : in bit_tweak; + liliput_on_out : out std_logic + ); + +end top; + +architecture top_arch of top is + +component roundexe_liliput port( + clock_i : in std_logic; + reset_i : in std_logic; + data_i : in bit128; --donnée d'entrée lors du premier Round + keyb_i : in bit_key; + tweak_i : in bit_tweak;
+ invert_i : in std_logic; + round_number_i : in std_logic_vector(7 downto 0); + permut_valid_i : in std_logic; --permet de savoir si on fait la permutation à la fin + muxsel_i : in std_logic; --En lien avec data_i permet la selection des données d'entrée au cours d'un Round + data_out_valid_i: in std_logic;
+ initroundkey_i : in std_logic; + data_o : out bit128 + ); +end component; + +component fsm_chiffrement port ( + start_i : in std_logic; + clock_i : in std_logic; + reset_i : in std_logic; + compteur_o : out std_logic_vector(7 downto 0); + liliput_on_out : out std_logic; --Sortie à titre informative + data_out_valid_o : out std_logic; --Vient à l'entrée du round exe pour s + initroundkey_o : out std_logic; + permutation_o : out std_logic;
+ invert_o : out std_logic; + muxsel_o : out std_logic); +end component; + +signal data_out_valid_o_s : std_logic; +signal permutation_o_s : std_logic; +signal compteur_o_s : std_logic_vector(7 downto 0); +signal muxsel_o_s : std_logic;
+signal initroundkey_s : std_logic;
+signal invert_s : std_logic; + + +begin + +machine_a_etat : fsm_chiffrement port map( + start_i => start_i, + clock_i => clock_i, + reset_i => reset_i, + compteur_o => compteur_o_s, + liliput_on_out => liliput_on_out, --Sortie à titre informative + data_out_valid_o => data_out_valid_o_s, --Vient à l'entrée du round exe pour s + initroundkey_o => initroundkey_s,
+ permutation_o => permutation_o_s,
+ invert_o => invert_s, + muxsel_o => muxsel_o_s +); + + +roundexe_general : roundexe_liliput port map( + clock_i => clock_i, + reset_i => reset_i, + data_i => data_i, + keyb_i => key_i, + tweak_i => tweak_i,
+ invert_i => invert_s, + round_number_i => compteur_o_s, + permut_valid_i => permutation_o_s, + muxsel_i => muxsel_o_s, + data_out_valid_i => data_out_valid_o_s,
+ initroundkey_i => initroundkey_s, + data_o => data_o +); + +end top_arch; + +configuration top_conf of top is + for top_arch + for machine_a_etat : fsm_chiffrement + use entity work.fsm_chiffrement(fsm_chiffrement_arch); + end for; + for roundexe_general : roundexe_liliput + use entity work.roundexe_liliput(roundexe_liliput_arch); + end for; + end for; +end configuration top_conf; |
