From a555bb68a86a8d57cd3cae3d5e3c14acfda6fd6d Mon Sep 17 00:00:00 2001 From: Kévin Le Gouguec Date: Tue, 26 Mar 2019 15:04:31 +0100 Subject: [implem-vhdl] Factorisation du code --- .../vhdl/Encrypt_Decypt/lilliputtbcii128v1/top.vhd | 102 --------------------- 1 file changed, 102 deletions(-) delete mode 100644 implementations/vhdl/Encrypt_Decypt/lilliputtbcii128v1/top.vhd (limited to 'implementations/vhdl/Encrypt_Decypt/lilliputtbcii128v1/top.vhd') diff --git a/implementations/vhdl/Encrypt_Decypt/lilliputtbcii128v1/top.vhd b/implementations/vhdl/Encrypt_Decypt/lilliputtbcii128v1/top.vhd deleted file mode 100644 index 69264b8..0000000 --- a/implementations/vhdl/Encrypt_Decypt/lilliputtbcii128v1/top.vhd +++ /dev/null @@ -1,102 +0,0 @@ -library IEEE; -library work; -use IEEE.numeric_std.all; -use IEEE.std_logic_1164.all; -use work.crypt_pack.all; - - -entity top is port ( - start_i : in std_logic; - clock_i : in std_logic; - reset_i : in std_logic; - data_i : in bit128; - key_i : in bit_key; - data_o : out bit128; - tweak_i : in bit_tweak; - decrypt_i : in std_logic; - liliput_on_out : out std_logic - ); - -end top; - -architecture top_arch of top is - -component roundexe_liliput port( - clock_i : in std_logic; - reset_i : in std_logic; - data_i : in bit128; --donnée d'entrée lors du premier Round - keyb_i : in bit_key; - tweak_i : in bit_tweak; - invert_i : in std_logic; - round_number_i : in integer; - permut_valid_i : in std_logic; --permet de savoir si on fait la permutation à la fin - muxsel_i : in std_logic; --En lien avec data_i permet la selection des données d'entrée au cours d'un Round - data_out_valid_i : in std_logic; - decrypt_i : in std_logic; - data_o : out bit128 - ); -end component; - -component fsm_chiffrement port ( - start_i : in std_logic; - clock_i : in std_logic; - reset_i : in std_logic; - decrypt_i : in std_logic; - compteur_o : out integer; - liliput_on_out : out std_logic; --Sortie à titre informative - data_out_valid_o : out std_logic; --Vient à l'entrée du round exe pour s - permutation_o : out std_logic; - invert_o : out std_logic; - muxsel_o : out std_logic - ); -end component; - -signal data_out_valid_o_s : std_logic; -signal permutation_o_s : std_logic; -signal compteur_o_s : integer; -signal muxsel_o_s : std_logic; -signal invert_s : std_logic; - -begin - -machine_a_etat : fsm_chiffrement port map( - start_i => start_i, - clock_i => clock_i, - reset_i => reset_i, - decrypt_i => decrypt_i, - compteur_o => compteur_o_s, - liliput_on_out => liliput_on_out, --Sortie à titre informative - data_out_valid_o => data_out_valid_o_s, --Vient à l'entrée du round exe pour s - permutation_o => permutation_o_s, - invert_o => invert_s, - muxsel_o => muxsel_o_s -); - - -roundexe_general : roundexe_liliput port map( - clock_i => clock_i, - reset_i => reset_i, - data_i => data_i, - keyb_i => key_i, - tweak_i => tweak_i, - invert_i => invert_s, - round_number_i => compteur_o_s, - permut_valid_i => permutation_o_s, - muxsel_i => muxsel_o_s, - data_out_valid_i => data_out_valid_o_s, - decrypt_i => decrypt_i, - data_o => data_o -); - -end top_arch; - -configuration top_conf of top is - for top_arch - for machine_a_etat : fsm_chiffrement - use entity work.fsm_chiffrement(fsm_chiffrement_arch); - end for; - for roundexe_general : roundexe_liliput - use entity work.roundexe_liliput(roundexe_liliput_arch); - end for; - end for; -end configuration top_conf; -- cgit v1.2.3