sbox.vhd (1567B)
1 -- Implementation of the Lilliput-TBC tweakable block cipher by the 2 -- Lilliput-AE team, hereby denoted as "the implementer". 3 -- 4 -- For more information, feedback or questions, refer to our website: 5 -- https://paclido.fr/lilliput-ae 6 -- 7 -- To the extent possible under law, the implementer has waived all copyright 8 -- and related or neighboring rights to the source code in this file. 9 -- http://creativecommons.org/publicdomain/zero/1.0/ 10 11 library IEEE; 12 library work; 13 use IEEE.std_logic_1164.all; 14 use work.crypt_pack.all; 15 16 entity sbox is 17 port( 18 sbox_i : in bit8; 19 sbox_o : out bit8 20 ); 21 end sbox; 22 23 24 25 architecture sbox_arch of sbox is 26 27 signal a,b : std_logic_vector(3 downto 0); 28 29 signal ax,ay,at,az : std_logic; 30 signal aa,ab : std_logic; 31 32 signal bx,bz : std_logic; 33 signal bt,by : std_logic; 34 35 signal cx,cy,ct : std_logic; 36 signal ca,cb,cz : std_logic; 37 38 begin 39 40 41 aa <= sbox_i(3) xor sbox_i(1); 42 ab <= sbox_i(0) xor (sbox_i(2) and sbox_i(1)); 43 44 az <= sbox_i(2) xor ab; 45 ax <= aa and (sbox_i(2) xor ab); 46 ay <= sbox_i(3) and ab; 47 at <= (az xor sbox_i(3)) and (sbox_i(2) xor aa); 48 49 a <= ax & ay & az & at xor sbox_i(7 downto 4); 50 51 bx <= a(0) xor (a(3) and by); 52 bz <= a(3) xor (bt and by); 53 by <= a(2) xor (a(0) and a(1)); 54 bt <= a(1) xor (a(3) and a(0)); 55 56 b <= bx & by & bz & bt xor sbox_i(3 downto 0); 57 58 ca <= b(3) xor b(1); 59 cb <= not (b(0) xor (b(2) and b(1))); 60 61 cx <= ca and cz; 62 cz <= b(2) xor cb; 63 cy <= b(3) and cb; 64 ct <= (cz xor b(3)) and (b(2) xor ca); 65 66 sbox_o (7 downto 4) <= cx & cy & cz & ct xor a; 67 sbox_o (3 downto 0) <= b; 68 69 end sbox_arch; 70