key_schedule.vhd (3520B)
1 -- Implementation of the Lilliput-TBC tweakable block cipher by the 2 -- Lilliput-AE team, hereby denoted as "the implementer". 3 -- 4 -- For more information, feedback or questions, refer to our website: 5 -- https://paclido.fr/lilliput-ae 6 -- 7 -- To the extent possible under law, the implementer has waived all copyright 8 -- and related or neighboring rights to the source code in this file. 9 -- http://creativecommons.org/publicdomain/zero/1.0/ 10 11 library IEEE; 12 library work; 13 use IEEE.numeric_std.ALL; 14 use IEEE.STD_LOGIC_1164.ALL; 15 use work.crypt_pack.ALL; 16 17 entity key_schedule_liliput is 18 port ( 19 key_i : in type_tweak_key_array; 20 round_number : in std_logic_vector(7 downto 0); 21 invert_i : in std_logic; 22 key_o : out type_tweak_key_array; 23 round_key_o : out type_key 24 ); 25 end key_schedule_liliput; 26 27 architecture key_schedule_liliput_arch of key_schedule_liliput is 28 29 component multiplications 30 port( 31 mularray_i : in type_tweak_key_array; 32 mularray_o : out type_tweak_key_array 33 ); 34 end component; 35 36 component inv_multiplication 37 port( 38 mularray_i : in type_tweak_key_array; 39 mularray_o : out type_tweak_key_array 40 ); 41 end component; 42 43 signal key_s : type_tweak_key_array; 44 signal key_s_inv : type_tweak_key_array; 45 signal round_key_s : type_key; 46 47 begin 48 49 multiplications_t : multiplications 50 port map ( 51 mularray_i => key_i, 52 mularray_o => key_s 53 ); 54 55 inv_multiplications_t : inv_multiplication 56 port map ( 57 mularray_i => key_i, 58 mularray_o => key_s_inv 59 ); 60 61 key_o <= key_s when invert_i = '0' else 62 key_s_inv; 63 64 if_lane4 : if LANE_NB=4 generate 65 col2 : for j in 0 to 3 generate 66 round_key_s(0)(j) <= key_i(0)(j) xor key_i(1)(j) xor key_i(2)(j) xor key_i(3)(j) ; 67 round_key_s(1)(j) <= key_i(0)(j+4) xor key_i(1)(j+4) xor key_i(2)(j+4) xor key_i(3)(j+4); 68 end generate; 69 end generate; 70 71 if_lane5 : if LANE_NB=5 generate 72 col2 : for j in 0 to 3 generate 73 round_key_s(0)(j) <= key_i(0)(j) xor key_i(1)(j) xor key_i(2)(j) xor key_i(3)(j) xor key_i(4)(j) ; 74 round_key_s(1)(j) <= key_i(0)(j+4) xor key_i(1)(j+4) xor key_i(2)(j+4) xor key_i(3)(j+4) xor key_i(4)(j+4); 75 end generate; 76 end generate; 77 78 if_lane6 : if LANE_NB=6 generate 79 col2 : for j in 0 to 3 generate 80 round_key_s(0)(j) <= key_i(0)(j) xor key_i(1)(j) xor key_i(2)(j) xor key_i(3)(j) xor key_i(4)(j) xor key_i(5)(j) ; 81 round_key_s(1)(j) <= key_i(0)(j+4) xor key_i(1)(j+4) xor key_i(2)(j+4) xor key_i(3)(j+4) xor key_i(4)(j+4) xor key_i(5)(j+4); 82 end generate; 83 end generate; 84 85 if_lane7 : if LANE_NB=7 generate 86 col2 : for j in 0 to 3 generate 87 round_key_s(0)(j) <= key_i(0)(j) xor key_i(1)(j) xor key_i(2)(j) xor key_i(3)(j) xor key_i(4)(j) xor key_i(5)(j) xor key_i(6)(j) ; 88 round_key_s(1)(j) <= key_i(0)(j+4) xor key_i(1)(j+4) xor key_i(2)(j+4) xor key_i(3)(j+4) xor key_i(4)(j+4) xor key_i(5)(j+4) xor key_i(6)(j+4); 89 end generate; 90 end generate; 91 92 93 round_key_o(0)(0) <= round_key_s(0)(0) xor round_number; 94 round_key_o(0)(1) <= round_key_s(0)(1); 95 round_key_o(0)(2) <= round_key_s(0)(2); 96 round_key_o(0)(3) <= round_key_s(0)(3); 97 round_key_o(1) <= round_key_s(1); 98 99 100 end key_schedule_liliput_arch; 101 102 103 configuration key_schedule_liliput_conf of key_schedule_liliput is 104 for key_schedule_liliput_arch 105 for multiplications_t : multiplications 106 use entity work.multiplications(Behavioral); 107 end for; 108 for inv_multiplications_t : inv_multiplication 109 use entity work.inv_multiplication(inv_multiplication_arch); 110 end for; 111 end for; 112 end configuration key_schedule_liliput_conf ;